JP-2009-507305A discloses a peripheral component as an example of load driving device. This load driving device is connected to a computing device (hereinafter called “microcomputer”) through a serial multiline bus. Additionally, the load driving device includes an output stage for transmitting serial data to an external device.
Explanation is given on studies of the inventor of the present application, which are not the prior art. It is conceivable to determine whether abnormality is present in the received control data. An example of a method of determining whether the abnormality is present or not may include a parity check and a sum check.
However, the load driving device can conduct the above-mentioned determination when a communication cycle with the microcomputer is relatively long, but the determination is difficult when the communication cycle with the microcomputer is short. For example, the load driving device in JP-T-2009-507305 is connected to the microcomputer by a microsecond channel. The microsecond channel is characterized by a high-speed communication, and the communication cycle of a downstream is several μs. During this communication cycle, it is difficult that the microcomputer continuously implements calculation such as the parity check or the sum check by software. Additionally, during this communication cycle, it is difficult to add an error check bit to a data frame of the control data. Hereinafter, the microsecond channel is called “MSC” for simplicity.
As described above, there is a possibility that the load driving device could not determine whether abnormality is present in the received control data or not. Therefore, the load driving device may suffer from such a difficulty that when the abnormality is present in the received control data, the abnormality is generated in an output based on the control data, and the abnormality of the output is continued.